Senior Performance Engineer, Inference
Cerebras · Headquarters/Sunnyvale Office
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership https://openai.com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. ABOUT THE ROLE We are hiring a Senior Performance Engineer to join our Product team. You are an expert on state-of-the-art inference performance and will serve as our resident expert on how Cerebras stacks up against alternative inference providers on both price and performance. This role sits at the intersection of performance benchmarking from first principles and competitive intelligence. The role has two core pillars: 1. Performance Benchmarking You will build, run, and maintain reproducible benchmarks that measure Cerebras inference performance for real customer workloads. This includes metrics like tokens per second, time to first token, latency under concurrency, and total cost of ownership (TCO). 2. Competitive Pricing Intelligence You will build and maintain a living model of competitor pricing across the AI inference landscape, including cloud providers, custom silicon vendors, and inference API platforms. You will work directly with our Sales and Product teams to translate this intelligence into pricing recommendations for enterprise contracts, ensuring Cerebras offers a compelling value proposition for every customer. This role requires deep, hands-on fluency with open-source inference stacks (vLLM,